1. Field of the Invention
The present invention relates to a semiconductor device with a double-sided multi-chip package having chips of different functions mounted on each side of a circuit board. In particular, the present invention relates to a semiconductor device with a double-sided multi-chip package having chips on each side of a circuit board and distributed interface circuits for interfacing the chips with each other. The distributed interface circuits make the wiring designing of the circuit board easier.
2. Description of the Prior Art
FIG. 1 shows the top of a double-sided multi-chip package (MCP) device according to a prior art, and FIG. 2 shows the bottom thereof. The MCP device consists of a circuit board 51. The top surface of the circuit board 51 has a main chip 52, and the bottom surface thereof has an intellectual property (IP) chip 53. The main chip 52 contains an interface circuit 54 along a side of the main chip 52, to interface the main chip 52 and IP chip 53 with each other. Main-chip connecting terminals 55 are arranged around the main chip 52 on each side of the circuit board 51, to connect the main chip 52 to the bottom face of the circuit board 51 through the circuit board 51. The terminals 55 on the top surface of the circuit board 51 are connected to the main chip 52. Among the terminals 55, some are interfacing terminals 55a, which are arranged along the interface circuit 54 and are exclusively used by the interface circuit 54.
IP chip bonding terminals 56 are arranged on the bottom surface of the circuit board 51 around the IP chip 53 and are connected to the IP chip 53 with bonding wires. A wiring area 57 is formed between the terminals 56 and the terminals 55 and is used to connect the terminals 56 to the terminals 55a dedicated to the interface circuit 54. Package terminals 58 are arranged along the periphery of the bottom surface of the circuit board 51, to connect the double-sided MCP device to the outside. A wiring area 59 is formed between the terminals 58 and the terminals 55, to connect the terminals 55, except the terminals 55a, to the terminals 58.
According to this arrangement, the interface circuit 54 in the main chip 52 is collectively arranged along a side of the main chip 52, and therefore, the terminals 55a connected to the interface circuit 54 must be arranged in the vicinity of the side in question of the main chip 52. This widens differences among wire lengths in the wiring area 57 to connect the terminals 56 to the terminals 55a. This results in unbalancing wiring capacitance and resistance, complicating the optimization of the wiring capacitance and resistance, and making the designing of a circuit board difficult. At the center of the wiring area 57 on the bottom surface of the circuit board 51, wires must densely be arranged for the terminals 55a, to increase the size of the wiring area 57, thus increasing the size of the circuit board 51.
In addition, the terminals 55a for the interface circuit 54 are collectively arranged along a side of the circuit board 51 corresponding to the interface side of the main chip 52. As a result, only three sides around the IP chip 53 are available on the bottom surface of the circuit board 51 for arranging the terminals 55 to be connected to the terminals 58. This widens differences among wire lengths in the wiring area 59 to connect the terminals 55 to the terminals 58. This results in congesting wires in the wiring area 59 in the vicinity of the terminals 55a, thereby causing the problem mentioned above.
In this way, the prior art arranges an interface circuit along a side of a main chip to vary the lengths of wires for connecting main-chip connecting terminals, IP-chip connecting terminals, and package terminals. This complicates the optimization of wire lengths and makes the designing of a circuit board difficult. The prior art requires wires to be densely arranged, to thereby enlarge a wiring area and increasing the size of a circuit board.
An object of the present invention is to provide a semiconductor device with a double-sided multi-chip package that makes the designing of wiring between chips and terminals easier and improves wiring characteristics.
In order to accomplish the object, the present invention provides a semiconductor device having a circuit board, a main chip mounted on a first surface of the circuit board, a subchip mounted on a second surface of the circuit board, and interface circuits distributed in the main chip along four sides of the main chip, respectively, to interface the main chip and subchip with each other.
The semiconductor device may have subchip connecting terminals arranged around the main chip opposite to the interface circuits on each surface of the circuit board, to connect the interface circuits and the subchip to each other through the circuit board, main-chip connecting terminals arranged around the main chip at positions where the subchip connecting terminals are not present on each surface of the circuit board, to connect the main chip and the outside to each other, subchip bonding terminals arranged around the subchip on the second surface of the circuit board and connected to the subchip, and a first wiring area for connecting the subchip bonding terminals and the subchip connecting terminals to each other.
The semiconductor device may have package terminals arranged along the periphery of the circuit board, to connect the main chip and the outside to each other, and a second wiring area for connecting the package terminals and the main-chip connecting terminals to each other.
The interface circuits may be arranged at central parts of the four sides of the main chip, respectively. The package terminals may be arranged on the second surface of the circuit board.
According to the present invention, the interface circuits in the main chip are distributed along the four sides of the main chip, and the subchip connecting terminals are also distributed along the four sides of the main chip, to face the interface circuits. The first wiring area is distributed along the periphery of the subchip, to reduce the lengths of wires in the first wiring area and make the designing of wiring easier. The second wiring area is distributed along the periphery of the subchip, to make wiring easier. Consequently, the present invention reduces variations in wire lengths in the wiring areas, shortens wires in the wiring areas, relaxes the congestion of wires in the wiring areas, and makes the wiring areas smaller.
The present invention is not limited to a semiconductor device consisting of a circuit board, main chip, subchip, and interface circuits. The present invention is applicable to a semiconductor device consisting of a circuit board, a main board having chips and arranged on one surface of the circuit board, and a subboard having chips and arranged on the other surface of the circuit board. This device arranges interface chips at central parts of four sides of the main board, respectively, to interface the main board and the subboard with each other.